In the art of field effect transistor (FET) design, it is desirable to minimize the leakage (off-state) current while maximizing the drive (on-state) current of the FET. One known method for achieving this result is to surround the source and drain regions with pockets or halos of doping, while counterdoping the channel region. This practice minimizes the short-channel effects that negatively affect the performance of small-scale FETs. However, to achieve this result, a high level of doping is necessary in the pockets around the source and drain regions to counteract the effect of the counterdoping in the channel. The high level of doping results in high source and drain capacitances, thus decreasing the switching speed of the FET.